This application claims priority from U.S. Provisional Application Ser. No. 60/374,842 filed on Apr. 23, 2002.
This application claims priority from U.S. Provisional Application Ser. No. 60/374,843, filed on Apr. 23, 2002.
1. Field of the Invention
The invention relates generally to the field of integrated circuits, and more particularly to non-volatile memories.
2. Description of Related Art
The most desirable feature of a non-volatile memory (NVM) is the ability to store information for long periods of time. Various types of floating gate technology and many products are specified to keep information for up to 10 years or more. Thus, the ability of floating gate non-volatile memory cells to retain charge on the floating gate is of critical importance.
Charge retention losses are caused by:
a) Failures in the dielectrics surrounding the floating gate
b) Thermal excitation
c) Electron tunneling due to self induced or external electric fields
d) Hot electron effects in the channel close to the floating gate
Units that have faulty dielectrics surrounding the floating gate usually exhibit early functional failures and are eliminated by testing and/or procedures to induce early or infant mortality failures. In normal use, when information stored in the memory cell is not intended to be modified, the bias conditions on the cell should avoid the creation of hot electron effects in the nearby channel at all times.
The two sources of retention loss described in the previous paragraph can be eliminated by testing and by careful design, but the remaining sources continue to be a potential problem. If precise analog information is being stored even a small amount of charge loss is important. If digital information is being stored then larger amounts of charge loss can be tolerated but, nevertheless, in a high temperature environment or after many write cycles as the device enters the wearout phase, the rate of charge loss may be significant. In either case, while steps may be taken to minimize unwanted charge loss, some loss may be inevitable and information can be lost.
Accordingly, it is desirable to design a reference method that compensates for loss of charge and improve the retention characteristics. For a given storage period, analog storage can achieve improved accuracy and digital storage can support higher temperatures and improved endurance.
The invention discloses reference voltages that are stored, in addition to the analog or digital information, for reconstructing the original voltage value of one or more analog or digital signals stored in non-volatile memory cells. The reference voltages are stored in separate memory cells and are written at the same time as the target information. The target information may be a single analog voltage, multiple analog voltages or a burst of digital data and is written during a relatively short period of time during which the ambient conditions do not change significantly.
A method for recapturing an original voltage value Va that is stored in a non-volatile memory, comprising: providing a set of reference voltages from a reference voltage generator; at time=0, storing a signal voltage Va in a cell and the set of reference voltages in a plurality of cells; at time=t, reading back the first signal voltage Va from the cell and the set of reference voltages from the plurality of cells to determine a retention differential compensation parameter and a temperature compensation parameter; and reconstructing the original voltage value of the signal voltage Va from the retention differential compensation parameter and the temperature compensation parameter.
Other structures and methods are disclosed in the detailed description below. This summary does not purport to define the invention. The invention is defined by the claims.